Perry Newlin

About Perry Newlin

I’m a Junior at the Milwaukee School of Engineering. I’ve been actively involved in embedded systems, circuitry, and homebrew computers since I was 10 years old. I’m the person who has their entire living room full of custom PCBs, FPGA development boards, and wacky projects. I’m eager to continue applying my passion, skill, knowledge and love for the field of computer engineering to create innovative and elegant solutions.

Skills

• Python (Tkinter, PyQt, matplotlib, tensorflow, pytorch, transformers, pandas, pyserial, Qiskit, Flask)
• VHDL
• HTML/CSS
• Verilog/SystemVerilog
• TCL (TCL/Tk)
• C
• Java
• MATLAB
• Git
• PCB design
• Arduino/Arduino IDE
• CocoTB
• Questasim
• Harware in the loop (HIL)
• Simulink & Speedgoat

Websites

• easytrig.com Free and Easy Engineering Calculators.
• wrelks.com Blog website, resource collection for Qiskit/QuantumComputing, Quantum circuit sim w/ math
• relks.org Artificial Intelligence that survives in space.
• perrynewlin.com (Here!) minimalist portfolio website.
• theoneduck.com Software solutions for the everyday user, no subscriptions just elegant working stuff.

Certifications

• Quantum Algorithms for Cybersecurity, Chemistry, and Optimization

  Institution: Massachusetts Institute of Technology

  Link to Certification.

• Introduction to Quantum Computing

  Institution: Massachusetts Institute of Technology

  Link to Certification.

• Certificate of Quantum Excellence

  Institution: IBM Quantum

  Link to Certification.

• Introduction to Quantum Computing Course

  Institution: IBM Quantum

  Link to Certification.

• Arduino Fundamentals | Electronics and Physical Computing

  Institution: Arduino

  Link to Certification.

Projects

• 1Mbps FPGA to FPGA Network with Addressing Technologies Used: VHDL, TCL/Tk, Questasim, Vivado, Manchester, CRC8

  For CPE 3300 (Computer Networking) we were tasked with implementing a CSMACD networking protocol with addressing. I decided to implement the entire protocol in pure hardware, this allowed me to bring the specified bitrate of 1000bps all the way up to 1,000,000bps; this development process involved many test benches, a deep pipeline, and a lot of time on the saleae logic analyzer.

  The implementation includes but is not limited to the following:

  * Packet structure: (preamble, source, destination, length, message(1-255bytes), CRC8 FCS)

  * 8 Stage calibration pipeline on the Manchester decoder providing an extreme range of tolerances for decoding incoming Manchester streams.

  * Pseudorandom retransmission of packets if network is detected as a collision.

• AI Chatbot Technologies Used: Python (Flask, llama_cpp, HTTPServer)

  Custom made terminal frontend that allows the user to communicate with a quantized obliterated LLM. Watch the Demo!

• RM69330 Breakout Board & BLE App Technologies Used: C++, Teensy 4.0, Arduino IDE, Android Studio, Kotlin

  I Designed and manufactured a 1.8V digital logic level shifter board complete with interconnects to the display. The Android app I created connects to a user's phone over bluetooth; the user sends an image and is converted and displayed in beautiful 454x454 AMOLED. ACK/NACK was added to the image sending process to request a resend of dropped pixels during transmission.

• ARM Processor from scratch in VHDL. Technologies Used: Quartus, VHDL, ModelSIM

  In Digital Logic II I implemented an ARM processor in VHDL on the DE10, an FPGA development board.

• 8Bit Computer (SAP-1) from scratch Technologies Used: 74LS logic chips

  Started at 13Yrs old I began to construct the SAP-1 computer based on 'Digital Computer Electronics' from Paul Malvino; completed at 14yrs old.

Gallery

Interesting pictures I take during the creative process.

To prevent un-authorized use, a vast majority of the gallery is hidden (>500Pictures/Videos). Thank you for understanding.